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Rekomendowane odpowiedzi

prosze bardzo :

 

PCI

 

PCI=Peripheral Component Interconnect

 

PCI Universal Card 32/64 bit

----------------------------------------------------------------

| PCI Component Side (side B) |

| |

| |

| optional |

| ____ mandatory 32-bit pins 64-bit pins _____|

|___| |||||||--|||||||||||||||||--|||||||--||||||||||||||

-------^----^-^--------------^-^----^--^----------^

-----b01--b11-b14--------b49-b52-b62-b63----b94

PCI 5V Card 32/64 bit

| optional |

| ____ mandatory 32-bit pins 64-bit pins _____|

|___| ||||||||||||||||||||||||||--|||||||--||||||||||||||

PCI 3.3V Card 32/64 bit

| optional |

| ____ mandatory 32-bit pins 64-bit pins _____|

|___| |||||||--||||||||||||||||||||||||||--||||||||||||||

(at the computer)

 

98+22 PIN EDGE CONNECTOR at the computer.

 

Pin +5V +3.3V Universal Description

A1 TRST Test Logic Reset

A2 +12V +12 VDC

A3 TMS Test Mde Select

A4 TDI Test Data Input

A5 +5V +5 VDC

A6 INTA Interrupt A

A7 INTC Interrupt C

A8 +5V +5 VDC

A9 RESV01 Reserved VDC

A10 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)

A11 RESV03 Reserved VDC

A12 GND03 (OPEN) (OPEN) Ground or Open (Key)

A13 GND05 (OPEN) (OPEN) Ground or Open (Key)

A14 RESV05 Reserved VDC

A15 RESET Reset

A16 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)

A17 GNT Grant PCI use

A18 GND08 Ground

A19 RESV06 Reserved VDC

A20 AD30 Address/Data 30

A21 +3.3V01 +3.3 VDC

A22 AD28 Address/Data 28

A23 AD26 Address/Data 26

A24 GND10 Ground

A25 AD24 Address/Data 24

A26 IDSEL Initialization Device Select

A27 +3.3V03 +3.3 VDC

A28 AD22 Address/Data 22

A29 AD20 Address/Data 20

A30 GND12 Ground

A31 AD18 Address/Data 18

A32 AD16 Address/Data 16

A33 +3.3V05 +3.3 VDC

A34 FRAME Address or Data phase

A35 GND14 Ground

A36 TRDY Target Ready

A37 GND15 Ground

A38 STOP Stop Transfer Cycle

A39 +3.3V07 +3.3 VDC

A40 SDONE Snoop Done

A41 SBO Snoop Backoff

A42 GND17 Ground

A43 PAR Parity

A44 AD15 Address/Data 15

A45 +3.3V10 +3.3 VDC

A46 AD13 Address/Data 13

A47 AD11 Address/Data 11

A48 GND19 Ground

A49 AD9 Address/Data 9

A52 C/BE0 Command, Byte Enable 0

A53 +3.3V11 +3.3 VDC

A54 AD6 Address/Data 6

A55 AD4 Address/Data 4

A56 GND21 Ground

A57 AD2 Address/Data 2

A58 AD0 Address/Data 0

A59 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)

A60 REQ64 Request 64 bit ???

A61 VCC11 +5 VDC

A62 VCC13 +5 VDC

 

A63 GND Ground

A64 C/BE[7]# Command, Byte Enable 7

A65 C/BE[5]# Command, Byte Enable 5

A66 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)

A67 PAR64 Parity 64 ???

A68 AD62 Address/Data 62

A69 GND Ground

A70 AD60 Address/Data 60

A71 AD58 Address/Data 58

A72 GND Ground

A73 AD56 Address/Data 56

A74 AD54 Address/Data 54

A75 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)

A76 AD52 Address/Data 52

A77 AD50 Address/Data 50

A78 GND Ground

A79 AD48 Address/Data 48

A80 AD46 Address/Data 46

A81 GND Ground

A82 AD44 Address/Data 44

A83 AD42 Address/Data 42

A84 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)

A85 AD40 Address/Data 40

A86 AD38 Address/Data 38

A87 GND Ground

A88 AD36 Address/Data 36

A89 AD34 Address/Data 34

A90 GND Ground

A91 AD32 Address/Data 32

A92 RES Reserved

A93 GND Ground

A94 RES Reserved

 

B1 -12V -12 VDC

B2 TCK Test Clock

B3 GND Ground

B4 TDO Test Data Output

B5 +5V +5 VDC

B6 +5V +5 VDC

B7 INTB Interrupt B

B8 INTD Interrupt D

B9 PRSNT1 Reserved

B10 RES +V I/O (+5 V or +3.3 V)

B11 PRSNT2 ??

B12 GND (OPEN) (OPEN) Ground or Open (Key)

B13 GND (OPEN) (OPEN) Ground or Open (Key)

B14 RES Reserved VDC

B15 GND Reset

B16 CLK Clock

B17 GND Ground

B18 REQ Request

B19 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)

B20 AD31 Address/Data 31

B21 AD29 Address/Data 29

B22 GND Ground

B23 AD27 Address/Data 27

B24 AD25 Address/Data 25

B25 +3.3V +3.3VDC

B26 C/BE3 Command, Byte Enable 3

B27 AD23 Address/Data 23

B28 GND Ground

B29 AD21 Address/Data 21

B30 AD19 Address/Data 19

B31 +3.3V +3.3 VDC

B32 AD17 Address/Data 17

B33 C/BE2 Command, Byte Enable 2

B34 GND13 Ground

B35 IRDY Initiator Ready

B36 +3.3V06 +3.3 VDC

B37 DEVSEL Device Select

B38 GND16 Ground

B39 LOCK Lock bus

B40 PERR Parity Error

B41 +3.3V08 +3.3 VDC

B42 SERR System Error

B43 +3.3V09 +3.3 VDC

B44 C/BE1 Command, Byte Enable 1

B45 AD14 Address/Data 14

B46 GND18 Ground

B47 AD12 Address/Data 12

B48 AD10 Address/Data 10

B49 GND20 Ground

B50 (OPEN) GND (OPEN) Ground or Open (Key)

B51 (OPEN) GND (OPEN) Ground or Open (Key)

B52 AD8 Address/Data 8

B53 AD7 Address/Data 7

B54 +3.3V12 +3.3 VDC

B55 AD5 Address/Data 5

B56 AD3 Address/Data 3

B57 GND22 Ground

B58 AD1 Address/Data 1

B59 VCC08 +5 VDC

B60 ACK64 Acknowledge 64 bit ???

B61 VCC10 +5 VDC

B62 VCC12 +5 VDC

 

B63 RES Reserved

B64 GND Ground

B65 C/BE[6]# Command, Byte Enable 6

B66 C/BE[4]# Command, Byte Enable 4

B67 GND Ground

B68 AD63 Address/Data 63

B69 AD61 Address/Data 61

B70 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)

B71 AD59 Address/Data 59

B72 AD57 Address/Data 57

B73 GND Ground

B74 AD55 Address/Data 55

B75 AD53 Address/Data 53

B76 GND Ground

B77 AD51 Address/Data 51

B78 AD49 Address/Data 49

B79 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)

B80 AD47 Address/Data 47

B81 AD45 Address/Data 45

B82 GND Ground

B83 AD43 Address/Data 43

B84 AD41 Address/Data 41

B85 GND Ground

B86 AD39 Address/Data 39

B87 AD37 Address/Data 37

B88 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)

B89 AD35 Address/Data 35

B90 AD33 Address/Data 33

B91 GND Ground

B92 RES Reserved

B93 RES Reserved

B94 GND Ground

 

Notes: Pin 63-94 exists only on 64 bit PCI implementations.

 

+V I/O is 3.3V on 3.3V boards, 5V on 5V boards, and define signal rails on the Universal board.

 

I AGP

 

132 PIN EDGE CONNECTOR at the computer.

 

Pin Name

A1 +12 V dc

A2 spare

A3 Reserved* Ground

A4 USB-

A5 Ground

A6 INTA#

A7 RST#

A8 GNT#

A9 VCC 3.3

A10 ST1

A11 Reserved

A12 PIPE#

A13 Ground

A14 Spare

A15 SBA1

A16 VCC 3.3

A17 SBA3

A18 Reserved

A19 Ground

A20 SBA5

A21 SBA7

A22 Key

A23 Key

A24 Key

A25 Key

A26 AD30

A27 AD28

A28 VCC 3.3

A29 AD26

A30 AD24

A31 Ground

A32 Reserved

A33 C/BE3#

A34 Vddq 3.3

A35 AD22

A36 AD20

A37 Ground

A38 AD18

A39 AD16

A40 Vddq 3.3

A41 FRAME#

A42 Spare

A43 Ground

A44 Spare

A45 VCC 3.3

A46 TRDY#

A47 STOP#

A48 Spare

A49 Ground

A50 PAR

A51 AD15

A52 Vddq 3.3

A53 AD13

A54 AD11

A55 Ground

A56 AD9

A57 C/BE0#

A58 Vddq 3.3

A59 Reserved

A60 AD6

A61 Ground

A62 AD4

A63 AD2

A64 Vddq 3.3

A65 AD0

A66 SMB1

B1 spare

B2 +5 V dc

B3 +5 V dc

B4 USB+

B5 Ground

B6 INTB#

B7 CLK

B8 REQ#

B9 VCC 3.3

B10 ST0

B11 ST2

B12 RBF#

B13 Ground

B14 Spare

B15 SBA0

B16 VCC 3.3

B17 SBA2

B18 SB_STB

B19 Ground

B20 SBA4

B21 SBA6

B22 Key

B23 Key

B24 Key

B25 Key

B26 AD31

B27 AD29

B28 VCC 3.3

B29 AD27

B30 AD25

B31 Ground

B32 AD STB1

B33 AD23

B34 Vddq 3.3

B35 AD21

B36 AD19

B37 Ground

B38 AD17

B39 C/BE2#

B40 Vddq 3.3

B41 IRDY#

B42 Spare

B43 Ground

B44 Spare

B45 VCC 3.3

B46 DEVSEL#

B47 Vddq 3.3

B48 PERR#

B49 Ground

B50 SERR#

B51 C/BE1#

B52 Vddq 3.3

B53 AD14

B54 AD12

B55 Ground

B56 AD10

B57 AD8

B58 Vddq 3.3

B59 AD STB0

B60 AD7

B61 Ground

B62 AD5

B63 AD3

B64 Vddq 3.3

B65 AD1

B66 SMB0

 

 

co do "przedluzek" jest to mozliwe i stosowane... do portu AGP o ile mnie pamiec nie myli max dl polaczen miedzy portem a stykami karty wynosi ~50mm (z zachowaniem zasad propgacji fal w nosniku stalym)

 

a co do PCI tu wymogi nie sa tak restrykcyjne... widzilem samorobki ktore normalnie pracowaly... co do zakupu... swego czasu firmy zajmujace sie maszynami sterowanymi cyfrowo sprzedawaly takie wynalazki... ostatni raz uzywalem tego typu "przedluzek/rozgaleziaczy" za czasow 386 i zlaczach ISA...

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wow, dzieki :D , nie spodziewałem się takiej obszerenj wypowiedzi :)

a wiecie może gdzie można dostać port (taką jak na płycie głuwnej) AGP i PCI (sprubuje sam zrobic sobie przelotke) i gdzie można dostać wtyki do tych gniazd ? i jakim kablem to najlepiej podłączyć (kilkoma taśmami hdd ? by pasowało ?)

i nie chodzi o długość , to po prostu ma zmieniać kąt położenia kart aby zmniejszyć obudowę

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prosze bardzo :

 

PCI

 

PCI=Peripheral Component Interconnect

 

PCI Universal Card 32/64 bit

----------------------------------------------------------------

|    PCI         Component Side (side B)                         |

|                                                                |

|                                                                |

|                                                optional        |

|    ____     mandatory 32-bit pins            64-bit pins  _____|

|___|    |||||||--|||||||||||||||||--|||||||--||||||||||||||

-------^----^-^--------------^-^----^--^----------^

-----b01--b11-b14--------b49-b52-b62-b63----b94

PCI 5V Card 32/64 bit

|                                                optional        |

|    ____     mandatory 32-bit pins            64-bit pins  _____|

|___|    ||||||||||||||||||||||||||--|||||||--||||||||||||||

PCI 3.3V Card 32/64 bit

|                                                optional        |

|    ____     mandatory 32-bit pins            64-bit pins  _____|

|___|    |||||||--||||||||||||||||||||||||||--||||||||||||||

(at the computer)

 

98+22 PIN EDGE CONNECTOR at the computer.

 

Pin +5V +3.3V Universal Description  

A1 TRST     Test Logic Reset  

A2 +12V     +12 VDC  

A3 TMS     Test Mde Select  

A4 TDI     Test Data Input  

A5 +5V     +5 VDC  

A6 INTA     Interrupt A  

A7 INTC     Interrupt C  

A8 +5V     +5 VDC  

A9 RESV01     Reserved VDC  

A10 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A11 RESV03     Reserved VDC  

A12 GND03 (OPEN) (OPEN) Ground or Open (Key)  

A13 GND05 (OPEN) (OPEN) Ground or Open (Key)  

A14 RESV05     Reserved VDC  

A15 RESET     Reset  

A16 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A17 GNT     Grant PCI use  

A18 GND08     Ground  

A19 RESV06     Reserved VDC  

A20 AD30     Address/Data 30  

A21 +3.3V01     +3.3 VDC  

A22 AD28     Address/Data 28  

A23 AD26     Address/Data 26  

A24 GND10     Ground  

A25 AD24     Address/Data 24  

A26 IDSEL     Initialization Device Select  

A27 +3.3V03     +3.3 VDC  

A28 AD22     Address/Data 22  

A29 AD20     Address/Data 20  

A30 GND12     Ground  

A31 AD18     Address/Data 18  

A32 AD16     Address/Data 16  

A33 +3.3V05     +3.3 VDC  

A34 FRAME     Address or Data phase  

A35 GND14     Ground  

A36 TRDY     Target Ready  

A37 GND15     Ground  

A38 STOP     Stop Transfer Cycle  

A39 +3.3V07     +3.3 VDC  

A40 SDONE     Snoop Done  

A41 SBO     Snoop Backoff  

A42 GND17     Ground  

A43 PAR     Parity  

A44 AD15     Address/Data 15  

A45 +3.3V10     +3.3 VDC  

A46 AD13     Address/Data 13  

A47 AD11     Address/Data 11  

A48 GND19     Ground  

A49 AD9     Address/Data 9  

A52 C/BE0     Command, Byte Enable 0  

A53 +3.3V11     +3.3 VDC  

A54 AD6     Address/Data 6  

A55 AD4     Address/Data 4  

A56 GND21     Ground  

A57 AD2     Address/Data 2  

A58 AD0     Address/Data 0  

A59 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A60 REQ64     Request 64 bit ???  

A61 VCC11     +5 VDC  

A62 VCC13     +5 VDC  

         

A63 GND     Ground  

A64 C/BE[7]#     Command, Byte Enable 7  

A65 C/BE[5]#     Command, Byte Enable 5  

A66 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A67 PAR64     Parity 64 ???  

A68 AD62     Address/Data 62  

A69 GND     Ground  

A70 AD60     Address/Data 60  

A71 AD58     Address/Data 58  

A72 GND     Ground  

A73 AD56     Address/Data 56  

A74 AD54     Address/Data 54  

A75 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A76 AD52     Address/Data 52  

A77 AD50     Address/Data 50  

A78 GND     Ground  

A79 AD48     Address/Data 48  

A80 AD46     Address/Data 46  

A81 GND     Ground  

A82 AD44     Address/Data 44  

A83 AD42     Address/Data 42  

A84 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A85 AD40     Address/Data 40  

A86 AD38     Address/Data 38  

A87 GND     Ground  

A88 AD36     Address/Data 36  

A89 AD34     Address/Data 34  

A90 GND     Ground  

A91 AD32     Address/Data 32  

A92 RES     Reserved  

A93 GND     Ground  

A94 RES     Reserved  

         

B1 -12V     -12 VDC  

B2 TCK     Test Clock  

B3 GND     Ground  

B4 TDO     Test Data Output  

B5 +5V     +5 VDC  

B6 +5V     +5 VDC  

B7 INTB     Interrupt B  

B8 INTD     Interrupt D  

B9 PRSNT1     Reserved  

B10 RES     +V I/O (+5 V or +3.3 V)  

B11 PRSNT2     ??  

B12 GND (OPEN) (OPEN) Ground or Open (Key)  

B13 GND (OPEN) (OPEN) Ground or Open (Key)  

B14 RES     Reserved VDC  

B15 GND     Reset  

B16 CLK     Clock  

B17 GND     Ground  

B18 REQ     Request  

B19 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

B20 AD31     Address/Data 31  

B21 AD29     Address/Data 29  

B22 GND     Ground  

B23 AD27     Address/Data 27  

B24 AD25     Address/Data 25  

B25 +3.3V     +3.3VDC  

B26 C/BE3     Command, Byte Enable 3  

B27 AD23     Address/Data 23  

B28 GND     Ground  

B29 AD21     Address/Data 21  

B30 AD19     Address/Data 19  

B31 +3.3V     +3.3 VDC  

B32 AD17     Address/Data 17  

B33 C/BE2     Command, Byte Enable 2  

B34 GND13     Ground  

B35 IRDY     Initiator Ready  

B36 +3.3V06     +3.3 VDC  

B37 DEVSEL     Device Select  

B38 GND16     Ground  

B39 LOCK     Lock bus  

B40 PERR     Parity Error  

B41 +3.3V08     +3.3 VDC  

B42 SERR     System Error  

B43 +3.3V09     +3.3 VDC  

B44 C/BE1     Command, Byte Enable 1  

B45 AD14     Address/Data 14  

B46 GND18     Ground  

B47 AD12     Address/Data 12  

B48 AD10     Address/Data 10  

B49 GND20     Ground  

B50 (OPEN) GND (OPEN) Ground or Open (Key)  

B51 (OPEN) GND (OPEN) Ground or Open (Key)  

B52 AD8     Address/Data 8  

B53 AD7     Address/Data 7  

B54 +3.3V12     +3.3 VDC  

B55 AD5     Address/Data 5  

B56 AD3     Address/Data 3  

B57 GND22     Ground  

B58 AD1     Address/Data 1  

B59 VCC08     +5 VDC  

B60 ACK64     Acknowledge 64 bit ???  

B61 VCC10     +5 VDC  

B62 VCC12     +5 VDC  

         

B63 RES     Reserved  

B64 GND     Ground  

B65 C/BE[6]#     Command, Byte Enable 6  

B66 C/BE[4]#     Command, Byte Enable 4  

B67 GND     Ground  

B68 AD63     Address/Data 63  

B69 AD61     Address/Data 61  

B70 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

B71 AD59     Address/Data 59  

B72 AD57     Address/Data 57  

B73 GND     Ground  

B74 AD55     Address/Data 55  

B75 AD53     Address/Data 53  

B76 GND     Ground  

B77 AD51     Address/Data 51  

B78 AD49     Address/Data 49  

B79 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

B80 AD47     Address/Data 47  

B81 AD45     Address/Data 45  

B82 GND     Ground  

B83 AD43     Address/Data 43  

B84 AD41     Address/Data 41  

B85 GND     Ground  

B86 AD39     Address/Data 39  

B87 AD37     Address/Data 37  

B88 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

B89 AD35     Address/Data 35  

B90 AD33     Address/Data 33  

B91 GND     Ground  

B92 RES     Reserved  

B93 RES     Reserved  

B94 GND     Ground  

 

Notes: Pin 63-94 exists only on 64 bit PCI implementations.

 

+V I/O is 3.3V on 3.3V boards, 5V on 5V boards, and define signal rails on the Universal board.

 

I AGP

 

132 PIN EDGE CONNECTOR at the computer.

 

Pin Name  

A1 +12 V dc  

A2 spare  

A3 Reserved* Ground  

A4 USB-  

A5 Ground  

A6 INTA#  

A7 RST#  

A8 GNT#  

A9 VCC 3.3  

A10 ST1  

A11 Reserved  

A12 PIPE#  

A13 Ground  

A14 Spare  

A15 SBA1  

A16 VCC 3.3  

A17 SBA3  

A18 Reserved  

A19 Ground  

A20 SBA5  

A21 SBA7  

A22 Key  

A23 Key  

A24 Key  

A25 Key  

A26 AD30  

A27 AD28  

A28 VCC 3.3  

A29 AD26  

A30 AD24  

A31 Ground  

A32 Reserved  

A33 C/BE3#  

A34 Vddq 3.3  

A35 AD22  

A36 AD20  

A37 Ground  

A38 AD18  

A39 AD16  

A40 Vddq 3.3  

A41 FRAME#  

A42 Spare  

A43 Ground  

A44 Spare  

A45 VCC 3.3  

A46 TRDY#  

A47 STOP#  

A48 Spare  

A49 Ground  

A50 PAR  

A51 AD15  

A52 Vddq 3.3  

A53 AD13  

A54 AD11  

A55 Ground  

A56 AD9  

A57 C/BE0#  

A58 Vddq 3.3  

A59 Reserved  

A60 AD6  

A61 Ground  

A62 AD4  

A63 AD2  

A64 Vddq 3.3  

A65 AD0  

A66 SMB1  

B1 spare  

B2 +5 V dc  

B3 +5 V dc  

B4 USB+  

B5 Ground  

B6 INTB#  

B7 CLK  

B8 REQ#  

B9 VCC 3.3  

B10 ST0  

B11 ST2  

B12 RBF#  

B13 Ground  

B14 Spare  

B15 SBA0  

B16 VCC 3.3  

B17 SBA2  

B18 SB_STB  

B19 Ground  

B20 SBA4  

B21 SBA6  

B22 Key  

B23 Key  

B24 Key  

B25 Key  

B26 AD31  

B27 AD29  

B28 VCC 3.3  

B29 AD27  

B30 AD25  

B31 Ground  

B32 AD STB1  

B33 AD23  

B34 Vddq 3.3  

B35 AD21  

B36 AD19  

B37 Ground  

B38 AD17  

B39 C/BE2#  

B40 Vddq 3.3  

B41 IRDY#  

B42 Spare  

B43 Ground  

B44 Spare  

B45 VCC 3.3  

B46 DEVSEL#  

B47 Vddq 3.3  

B48 PERR#  

B49 Ground  

B50 SERR#  

B51 C/BE1#  

B52 Vddq 3.3  

B53 AD14  

B54 AD12  

B55 Ground  

B56 AD10  

B57 AD8  

B58 Vddq 3.3  

B59 AD STB0  

B60 AD7  

B61 Ground  

B62 AD5  

B63 AD3  

B64 Vddq 3.3  

B65 AD1  

B66 SMB0

 

 

co do "przedluzek" jest to mozliwe i stosowane... do portu AGP o ile mnie pamiec nie myli max dl polaczen miedzy portem a stykami karty wynosi ~50mm (z zachowaniem zasad propgacji fal w nosniku stalym)

 

a co do PCI tu wymogi nie sa tak restrykcyjne... widzilem samorobki ktore normalnie pracowaly... co do zakupu... swego czasu firmy zajmujace sie maszynami sterowanymi cyfrowo sprzedawaly takie wynalazki... ostatni raz uzywalem tego typu "przedluzek/rozgaleziaczy" za czasow 386 i zlaczach ISA...

bardzo interesujące :mrgreen:

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prosze bardzo :

 

PCI

 

PCI=Peripheral Component Interconnect

 

PCI Universal Card 32/64 bit

----------------------------------------------------------------

|    PCI         Component Side (side B)                         |

|                                                                |

|                                                                |

|                                                optional        |

|    ____     mandatory 32-bit pins            64-bit pins  _____|

|___|    |||||||--|||||||||||||||||--|||||||--||||||||||||||

-------^----^-^--------------^-^----^--^----------^

-----b01--b11-b14--------b49-b52-b62-b63----b94

PCI 5V Card 32/64 bit

|                                                optional        |

|    ____     mandatory 32-bit pins            64-bit pins  _____|

|___|    ||||||||||||||||||||||||||--|||||||--||||||||||||||

PCI 3.3V Card 32/64 bit

|                                                optional        |

|    ____     mandatory 32-bit pins            64-bit pins  _____|

|___|    |||||||--||||||||||||||||||||||||||--||||||||||||||

(at the computer)

 

98+22 PIN EDGE CONNECTOR at the computer.

 

Pin +5V +3.3V Universal Description  

A1 TRST     Test Logic Reset  

A2 +12V     +12 VDC  

A3 TMS     Test Mde Select  

A4 TDI     Test Data Input  

A5 +5V     +5 VDC  

A6 INTA     Interrupt A  

A7 INTC     Interrupt C  

A8 +5V     +5 VDC  

A9 RESV01     Reserved VDC  

A10 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A11 RESV03     Reserved VDC  

A12 GND03 (OPEN) (OPEN) Ground or Open (Key)  

A13 GND05 (OPEN) (OPEN) Ground or Open (Key)  

A14 RESV05     Reserved VDC  

A15 RESET     Reset  

A16 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A17 GNT     Grant PCI use  

A18 GND08     Ground  

A19 RESV06     Reserved VDC  

A20 AD30     Address/Data 30  

A21 +3.3V01     +3.3 VDC  

A22 AD28     Address/Data 28  

A23 AD26     Address/Data 26  

A24 GND10     Ground  

A25 AD24     Address/Data 24  

A26 IDSEL     Initialization Device Select  

A27 +3.3V03     +3.3 VDC  

A28 AD22     Address/Data 22  

A29 AD20     Address/Data 20  

A30 GND12     Ground  

A31 AD18     Address/Data 18  

A32 AD16     Address/Data 16  

A33 +3.3V05     +3.3 VDC  

A34 FRAME     Address or Data phase  

A35 GND14     Ground  

A36 TRDY     Target Ready  

A37 GND15     Ground  

A38 STOP     Stop Transfer Cycle  

A39 +3.3V07     +3.3 VDC  

A40 SDONE     Snoop Done  

A41 SBO     Snoop Backoff  

A42 GND17     Ground  

A43 PAR     Parity  

A44 AD15     Address/Data 15  

A45 +3.3V10     +3.3 VDC  

A46 AD13     Address/Data 13  

A47 AD11     Address/Data 11  

A48 GND19     Ground  

A49 AD9     Address/Data 9  

A52 C/BE0     Command, Byte Enable 0  

A53 +3.3V11     +3.3 VDC  

A54 AD6     Address/Data 6  

A55 AD4     Address/Data 4  

A56 GND21     Ground  

A57 AD2     Address/Data 2  

A58 AD0     Address/Data 0  

A59 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A60 REQ64     Request 64 bit ???  

A61 VCC11     +5 VDC  

A62 VCC13     +5 VDC  

         

A63 GND     Ground  

A64 C/BE[7]#     Command, Byte Enable 7  

A65 C/BE[5]#     Command, Byte Enable 5  

A66 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A67 PAR64     Parity 64 ???  

A68 AD62     Address/Data 62  

A69 GND     Ground  

A70 AD60     Address/Data 60  

A71 AD58     Address/Data 58  

A72 GND     Ground  

A73 AD56     Address/Data 56  

A74 AD54     Address/Data 54  

A75 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A76 AD52     Address/Data 52  

A77 AD50     Address/Data 50  

A78 GND     Ground  

A79 AD48     Address/Data 48  

A80 AD46     Address/Data 46  

A81 GND     Ground  

A82 AD44     Address/Data 44  

A83 AD42     Address/Data 42  

A84 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

A85 AD40     Address/Data 40  

A86 AD38     Address/Data 38  

A87 GND     Ground  

A88 AD36     Address/Data 36  

A89 AD34     Address/Data 34  

A90 GND     Ground  

A91 AD32     Address/Data 32  

A92 RES     Reserved  

A93 GND     Ground  

A94 RES     Reserved  

         

B1 -12V     -12 VDC  

B2 TCK     Test Clock  

B3 GND     Ground  

B4 TDO     Test Data Output  

B5 +5V     +5 VDC  

B6 +5V     +5 VDC  

B7 INTB     Interrupt B  

B8 INTD     Interrupt D  

B9 PRSNT1     Reserved  

B10 RES     +V I/O (+5 V or +3.3 V)  

B11 PRSNT2     ??  

B12 GND (OPEN) (OPEN) Ground or Open (Key)  

B13 GND (OPEN) (OPEN) Ground or Open (Key)  

B14 RES     Reserved VDC  

B15 GND     Reset  

B16 CLK     Clock  

B17 GND     Ground  

B18 REQ     Request  

B19 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

B20 AD31     Address/Data 31  

B21 AD29     Address/Data 29  

B22 GND     Ground  

B23 AD27     Address/Data 27  

B24 AD25     Address/Data 25  

B25 +3.3V     +3.3VDC  

B26 C/BE3     Command, Byte Enable 3  

B27 AD23     Address/Data 23  

B28 GND     Ground  

B29 AD21     Address/Data 21  

B30 AD19     Address/Data 19  

B31 +3.3V     +3.3 VDC  

B32 AD17     Address/Data 17  

B33 C/BE2     Command, Byte Enable 2  

B34 GND13     Ground  

B35 IRDY     Initiator Ready  

B36 +3.3V06     +3.3 VDC  

B37 DEVSEL     Device Select  

B38 GND16     Ground  

B39 LOCK     Lock bus  

B40 PERR     Parity Error  

B41 +3.3V08     +3.3 VDC  

B42 SERR     System Error  

B43 +3.3V09     +3.3 VDC  

B44 C/BE1     Command, Byte Enable 1  

B45 AD14     Address/Data 14  

B46 GND18     Ground  

B47 AD12     Address/Data 12  

B48 AD10     Address/Data 10  

B49 GND20     Ground  

B50 (OPEN) GND (OPEN) Ground or Open (Key)  

B51 (OPEN) GND (OPEN) Ground or Open (Key)  

B52 AD8     Address/Data 8  

B53 AD7     Address/Data 7  

B54 +3.3V12     +3.3 VDC  

B55 AD5     Address/Data 5  

B56 AD3     Address/Data 3  

B57 GND22     Ground  

B58 AD1     Address/Data 1  

B59 VCC08     +5 VDC  

B60 ACK64     Acknowledge 64 bit ???  

B61 VCC10     +5 VDC  

B62 VCC12     +5 VDC  

         

B63 RES     Reserved  

B64 GND     Ground  

B65 C/BE[6]#     Command, Byte Enable 6  

B66 C/BE[4]#     Command, Byte Enable 4  

B67 GND     Ground  

B68 AD63     Address/Data 63  

B69 AD61     Address/Data 61  

B70 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

B71 AD59     Address/Data 59  

B72 AD57     Address/Data 57  

B73 GND     Ground  

B74 AD55     Address/Data 55  

B75 AD53     Address/Data 53  

B76 GND     Ground  

B77 AD51     Address/Data 51  

B78 AD49     Address/Data 49  

B79 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

B80 AD47     Address/Data 47  

B81 AD45     Address/Data 45  

B82 GND     Ground  

B83 AD43     Address/Data 43  

B84 AD41     Address/Data 41  

B85 GND     Ground  

B86 AD39     Address/Data 39  

B87 AD37     Address/Data 37  

B88 +5V +3.3V Signal Rail +V I/O (+5 V or +3.3 V)  

B89 AD35     Address/Data 35  

B90 AD33     Address/Data 33  

B91 GND     Ground  

B92 RES     Reserved  

B93 RES     Reserved  

B94 GND     Ground  

 

Notes: Pin 63-94 exists only on 64 bit PCI implementations.

 

+V I/O is 3.3V on 3.3V boards, 5V on 5V boards, and define signal rails on the Universal board.

 

I AGP

 

132 PIN EDGE CONNECTOR at the computer.

 

Pin Name  

A1 +12 V dc  

A2 spare  

A3 Reserved* Ground  

A4 USB-  

A5 Ground  

A6 INTA#  

A7 RST#  

A8 GNT#  

A9 VCC 3.3  

A10 ST1  

A11 Reserved  

A12 PIPE#  

A13 Ground  

A14 Spare  

A15 SBA1  

A16 VCC 3.3  

A17 SBA3  

A18 Reserved  

A19 Ground  

A20 SBA5  

A21 SBA7  

A22 Key  

A23 Key  

A24 Key  

A25 Key  

A26 AD30  

A27 AD28  

A28 VCC 3.3  

A29 AD26  

A30 AD24  

A31 Ground  

A32 Reserved  

A33 C/BE3#  

A34 Vddq 3.3  

A35 AD22  

A36 AD20  

A37 Ground  

A38 AD18  

A39 AD16  

A40 Vddq 3.3  

A41 FRAME#  

A42 Spare  

A43 Ground  

A44 Spare  

A45 VCC 3.3  

A46 TRDY#  

A47 STOP#  

A48 Spare  

A49 Ground  

A50 PAR  

A51 AD15  

A52 Vddq 3.3  

A53 AD13  

A54 AD11  

A55 Ground  

A56 AD9  

A57 C/BE0#  

A58 Vddq 3.3  

A59 Reserved  

A60 AD6  

A61 Ground  

A62 AD4  

A63 AD2  

A64 Vddq 3.3  

A65 AD0  

A66 SMB1  

B1 spare  

B2 +5 V dc  

B3 +5 V dc  

B4 USB+  

B5 Ground  

B6 INTB#  

B7 CLK  

B8 REQ#  

B9 VCC 3.3  

B10 ST0  

B11 ST2  

B12 RBF#  

B13 Ground  

B14 Spare  

B15 SBA0  

B16 VCC 3.3  

B17 SBA2  

B18 SB_STB  

B19 Ground  

B20 SBA4  

B21 SBA6  

B22 Key  

B23 Key  

B24 Key  

B25 Key  

B26 AD31  

B27 AD29  

B28 VCC 3.3  

B29 AD27  

B30 AD25  

B31 Ground  

B32 AD STB1  

B33 AD23  

B34 Vddq 3.3  

B35 AD21  

B36 AD19  

B37 Ground  

B38 AD17  

B39 C/BE2#  

B40 Vddq 3.3  

B41 IRDY#  

B42 Spare  

B43 Ground  

B44 Spare  

B45 VCC 3.3  

B46 DEVSEL#  

B47 Vddq 3.3  

B48 PERR#  

B49 Ground  

B50 SERR#  

B51 C/BE1#  

B52 Vddq 3.3  

B53 AD14  

B54 AD12  

B55 Ground  

B56 AD10  

B57 AD8  

B58 Vddq 3.3  

B59 AD STB0  

B60 AD7  

B61 Ground  

B62 AD5  

B63 AD3  

B64 Vddq 3.3  

B65 AD1  

B66 SMB0

 

 

co do "przedluzek" jest to mozliwe i stosowane... do portu AGP o ile mnie pamiec nie myli max dl polaczen miedzy portem a stykami karty wynosi ~50mm (z zachowaniem zasad propgacji fal w nosniku stalym)

 

a co do PCI tu wymogi nie sa tak restrykcyjne... widzilem samorobki ktore normalnie pracowaly... co do zakupu... swego czasu firmy zajmujace sie maszynami sterowanymi cyfrowo sprzedawaly takie wynalazki... ostatni raz uzywalem tego typu "przedluzek/rozgaleziaczy" za czasow 386 i zlaczach ISA...

bardzo interesujące :mrgreen:

jak cholera :P

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To niech jeszcze paru cytuje tego kolesia i w ogóle nie będzie się dało dojść do końca topicu...

NIe powiem mądrze napisał(nawet bardzo).

 

ALE NIE CYTUJCIE GO !!!

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wow, dzieki  :D , nie spodziewałem się takiej obszerenj wypowiedzi :)

a wiecie może gdzie można dostać port (taką jak na płycie głuwnej) AGP i PCI (sprubuje sam zrobic sobie przelotke) i gdzie można dostać wtyki do tych gniazd ? i jakim kablem to najlepiej podłączyć (kilkoma taśmami hdd ? by pasowało ?)

i nie chodzi o długość , to po prostu ma zmieniać kąt położenia kart aby zmniejszyć obudowę

w przypadku AGP jakiekolwiek tasmy czy kable odpadaja... no chyba ze zastosujesz sepcyfikacje AGPx1 wtedy (teoretycznie) na kablekach (krociutkich) ma szanse dzialac... z PCI wiekszego problemu nie ma... zlacza AGP i PCI ciezko dostac... raczej na zmowienie lub od firm zajmujacych sie ww technologiam.. najlepiej (najtaniej/najszybciej) wylutowac z jakiejs padnietej plyty... zlacz krawedziowych raczej nie dostaniesz.. tu takze klania sie ww metoda.. stara karta i odpilowanie zlacza.. zreszta pytanie jest takie czy to sie oplaca... wiedz o tym ze kazde zlacze na szynie powoduje starty itp... wiec stabilnosc takiego systemu bedzie zawsze nizsza niz w oryginale (1 zlacze)...

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